According to recent tendencies, cellular phones have cameras incorporated therein, and digital cameras require a reduction in size and thickness. Under the circumstances, a reduction in size of an image pickup section and a processing section has been greatly required. Advances in design and manufacturing technologies for ICs have enabled implementation of high integration of circuits and low power consumption. In association with this, there have been used image sensor packages in which the image pickup section and the processing section are integrally packaged.
In such an image sensor package, electrodes must be exposed from a side opposite an image sensor surface. Conventionally, such an exposure of electrodes is performed by use of a through wiring technique. In the through wiring technique, through holes are formed in a semiconductor substrate and filled with a metal material. FIG. 54 is a view for explaining a conventional through wiring technique disclosed in Patent Document 1. The silicon substrate shown in FIG. 54 is a primary semiconductor substrate. A wiring-and-electrode-pad layer is provided on the upper surface of the silicon substrate via an insulation layer. The inner peripheral surface of an opening and the back face of the silicon substrate are covered with an insulation film. The silicon substrate is reduced in thickness to such an extent as to be very thin. By virtue of a reduction in thickness of the silicon substrate, etching is facilitated, and formation of the insulation film is also facilitated. A glass support body is provided on the upper side of the silicon substrate. Another substrate is attached to the back face side of the silicon substrate. The other substrate has a through hole formed therein at a position corresponding to the above-mentioned opening. Through wiring is formed in the opening and the hole, and connection to an external terminal is established via the through wiring.
The above-mentioned affixation of the other substrate to the silicon substrate ensures the strength of a resultant semiconductor chip and enables a reduction in the thickness of the primary silicon substrate. Reducing the thickness of the silicon substrate shortens time required for a silicon etching process, an insulation film formation process, an insulation film etching process, a metal material filling process, etc., so that the cost of manufacturing a semiconductor device can be lowered.
However, although the silicon substrate is reduced in thickness, the exemplary image sensor package still requires use of a through wiring technique for forming openings in the silicon substrate and filling the openings with a metal material.
Similar to the image sensor package, a package in which a high-power LSI chip and a heat sink are united together requires a technique for facilitating wiring to external terminals (electrodes) provided on a side opposite the heat sink.
Patent Document 1: Japanese Patent Application Laid-Open (kokai) No. 2007-158078